Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10089194 | System and method for false pass detection in lockstep dual core or triple modular redundancy (TMR) systems | Palkesh Jain, Rahul Gulati | 2018-10-02 |
| 9915968 | Systems and methods for adaptive clock design | Palkesh Jain, Manoj Mehrotra, Keith Alan Bowman | 2018-03-13 |
| 9897651 | Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications | Rahul Gulati, Palkesh Jain, Roberto Avanzi | 2018-02-20 |