Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10140175 | Protecting an ECC location when transmitting correction data across a memory link | Jungwon Suh | 2018-11-27 |
| 10061645 | Memory array and link error correction in a low power memory sub-system | Jungwon Suh | 2018-08-28 |
| 9965352 | Separate link and array error correction in a memory system | Jungwon Suh | 2018-05-08 |
| 9947377 | Providing memory training of dynamic random access memory (DRAM) systems using port-to-port loopbacks, and related methods, systems, and apparatuses | Vaishnav Srinivas, Michael Brunolli, Dexter Tamio Chun | 2018-04-17 |
| 9881656 | Dynamic random access memory (DRAM) backchannel communication systems and methods | Michael Brunolli, Dexter Tamio Chun, Vaishnav Srinivas | 2018-01-30 |
| 9871012 | Method and apparatus for routing die signals using external interconnects | Vaishnav Srinivas, Bernie Jord Yang, Michael Brunolli, Charles David Paynter | 2018-01-16 |