{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2018", "item": "https://www.patentleaderboard.com/2018/"}, {"@type": "ListItem", "position": 3, "name": "Psemi", "item": "https://www.patentleaderboard.com/2018/company/psemi"}, {"@type": "ListItem", "position": 4, "name": "Simon Edward Willard", "item": "https://www.patentleaderboard.com/2018/inventor/fl:si_ln:willard-1"}]}

Home › 2018 › Psemi › Simon Edward Willard

Simon Edward Willard — 3 Patents in 2018

PSPsemi: 2 patents #21 of 71Top 30%

PSPeregrine Semiconductor: 1 patents #4 of 23Top 20%

San Diego, CA: #610 of 4,341 inventorsTop 15%

California: #7,478 of 60,411 inventorsTop 15%

Overall (2018): #56,928 of 503,207Top 15%

3 Patents 2018

Issued Patents 2018

Showing 1–3 of 3 patents

Patent #	Title	Co-Inventors	Date
10147740	Methods and structures for reducing back gate effect in a semiconductor device	Buddhika Abesingha, Alain Duvallet, Merlin Green, Sivakumar KUMARASAMY	2018-12-04
10115787	Low leakage FET	Abhijeet Paul, Alain Duvallet	2018-10-30
9882531	Body tie optimization for stacked transistor amplifier	Chris Olson, Tero Tapio Ranta	2018-01-30

Simon Edward Willard — 3 Patents in 2018

Issued Patents 2018

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