Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10147740 | Methods and structures for reducing back gate effect in a semiconductor device | Buddhika Abesingha, Simon Edward Willard, Alain Duvallet, Sivakumar KUMARASAMY | 2018-12-04 |
| 10044347 | Dead time control circuit for a level shifter | Buddhika Abesingha | 2018-08-07 |
| 9912327 | Dead time control circuit for a level shifter | Buddhika Abesingha | 2018-03-06 |