Issued Patents 2018
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9922866 | Enhancing robustness of SOI substrate containing a buried N+ silicon layer for CMOS processing | Stephen W. Bedell, Joel P. de Souza, Karen A. Nummy, Daniel J. Poindexter, Devendra K. Sadana | 2018-03-20 |