Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9922866 | Enhancing robustness of SOI substrate containing a buried N+ silicon layer for CMOS processing | Stephen W. Bedell, Stephan A. Cohen, Joel P. de Souza, Daniel J. Poindexter, Devendra K. Sadana | 2018-03-20 |
| 9871057 | Field-effect transistors with a non-relaxed strained channel | Claude Ortolland | 2018-01-16 |