Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10140415 | Method and system for verifying layout of integrated circuit including vertical memory cells | Jae Eun Lee, Sung Hoon Kim, Hyang-Ja Yang | 2018-11-27 |
| 9929172 | Method of verifying layout of vertical memory device | Ki-Won Kim, Sung Hoon Kim | 2018-03-27 |