Issued Patents 2018
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10102474 | Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural network | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Bryan L. Jackson, Paul A. Merolla, Dharmendra S. Modha +1 more | 2018-10-16 |
| 9992057 | Yield tolerance in a neurosynaptic system | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Bryan L. Jackson, Paul A. Merolla, Dharmendra S. Modha +1 more | 2018-06-05 |
| 9984324 | Dual deterministic and stochastic neurosynaptic core circuit | Rodrigo Alvarez-Icaza, John V. Arthur, Bryan L. Jackson, Paul A. Merolla, Dharmendra S. Modha +1 more | 2018-05-29 |
| 9940302 | Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Subramanian S. Iyer, Bryan L. Jackson +3 more | 2018-04-10 |
| 9924490 | Scaling multi-core neurosynaptic networks across chip boundaries | Rodrigo Alvarez Icaza Rivera, John V. Arthur, Bryan L. Jackson, Paul A. Merolla, Dharmendra S. Modha +1 more | 2018-03-20 |
| 9886662 | Converting spike event data to digital numeric data | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Steven K. Esser, Myron D. Flickner, Bryan L. Jackson +4 more | 2018-02-06 |
| 9881252 | Converting digital numeric data to spike event data | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Steven K. Esser, Myron D. Flickner, Bryan L. Jackson +4 more | 2018-01-30 |