Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10094859 | Voltage detector | Prasad Chalasani, Majid Jalali Far | 2018-10-09 |
| 10061340 | Bandgap reference voltage generator | Majid Jalali Far | 2018-08-28 |
| 10014866 | Clock alignment scheme for data macros of DDR PHY | Narasimhan Vasudevan, Prasad Chalasani | 2018-07-03 |
| 9971975 | Optimal data eye for improved Vref margin | Ravindra Kantamani, Prasad Chalasani | 2018-05-15 |
| 9954538 | Clock alignment scheme for data macros of DDR PHY | Narasimhan Vasudevan, Prasad Chalasani | 2018-04-24 |
| 9948310 | Methods and systems for clocking a physical layer interface | Prasad Chalasani | 2018-04-17 |