PC

Prasad Chalasani

IN Invecas: 4 patents #2 of 9Top 25%
OA Oath: 1 patents #51 of 352Top 15%
SO Soctronics: 1 patents #1 of 2Top 50%
📍 San Jose, CA: #336 of 5,991 inventorsTop 6%
🗺 California: #2,510 of 60,411 inventorsTop 5%
Overall (2018): #17,895 of 503,207Top 4%
6
Patents 2018

Issued Patents 2018

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
10094859 Voltage detector Venkata N. S. N. Rao, Majid Jalali Far 2018-10-09
10037540 Framework for marketplace analysis Tarun Bhatia, Rohit Chandra 2018-07-31
10014866 Clock alignment scheme for data macros of DDR PHY Narasimhan Vasudevan, Venkata N. S. N. Rao 2018-07-03
9971975 Optimal data eye for improved Vref margin Venkata N. S. N. Rao, Ravindra Kantamani 2018-05-15
9954538 Clock alignment scheme for data macros of DDR PHY Narasimhan Vasudevan, Venkata N. S. N. Rao 2018-04-24
9948310 Methods and systems for clocking a physical layer interface Venkata N. S. N. Rao 2018-04-17