Issued Patents 2018
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162639 | Methods, apparatus, instructions and logic to provide permute controls with leading zero count functionality | Christopher J. Hughes, Mikhail Plotnikov, Andrey Naraikin | 2018-12-25 |
| 10162638 | Methods, apparatus, instructions and logic to provide permute controls with leading zero count functionality | Christopher J. Hughes, Mikhail Plotnikov, Andrey Naraikin | 2018-12-25 |
| 10162637 | Methods, apparatus, instructions and logic to provide permute controls with leading zero count functionality | Christopher J. Hughes, Mikhail Plotnikov, Andrey Naraikin | 2018-12-25 |
| 10156884 | Local power gate (LPG) interfaces for power-aware operations | Michael Mishaeli, Ron Gabor, Alex Gerber, Zeev Sperber | 2018-12-18 |
| 10152451 | Scatter using index array and finite state machine | Zeev Sperber, Shlomo Raikin, Stanislav Shwartsman, Gal Ofir, Igor Yanover +2 more | 2018-12-11 |
| 10146535 | Systems, apparatuses, and methods for chained fused multiply add | Jesus Corbal, Roman S. Dubtsov, Nikita A. Shustrov, Mark J. Charney, Dennis R. Bradford +4 more | 2018-12-04 |
| 10146737 | Gather using index array and finite state machine | Zeev Sperber, Guy Patkin, Stanislav Shwartsman, Shlomo Raikin, Igor Yanover +1 more | 2018-12-04 |
| 10140210 | Method and apparatus for cache occupancy determination and instruction scheduling | Ayal Zaks, Arie Narkis | 2018-11-27 |
| 10120684 | Instructions and logic to perform mask load and store operations as sequential or one-at-a-time operations after exceptions and for un-cacheable type memory | Doron Orenstien, Zeev Sperber, Benny Eitan | 2018-11-06 |
| 10114651 | Gathering and scattering multiple data elements | Christopher J. Hughes, Yen-Kuang Chen, Mayank Bomb, Jason W. Brandt, Mark Buxton +13 more | 2018-10-30 |
| 10095516 | Vector multiplication with accumulation in large register space | Shay Gueron, Vlad Krasnov, Zeev Sperber, Amit Gradstein, Simon Rubanovich | 2018-10-09 |
| 10095521 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Eliezer Weissmann, Dror Markovich, Yuval Yosef | 2018-10-09 |
| 10095515 | Compressed instruction format | Doron Orenstein, Bret L. Toll | 2018-10-09 |
| 10089113 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Eliezer Weissmann, Dror Markovich, Yuval Yosef | 2018-10-02 |
| 10089076 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Amit Gradstein, Simon Rubanovich, Benny Eitan | 2018-10-02 |
| 10083037 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Eliezer Weissmann, Dror Markovich, Yuval Yosef | 2018-09-25 |
| 10083316 | Instruction execution that broadcasts and masks data values at different levels of granularity | Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Bret L. Toll, Mark J. Charney | 2018-09-25 |
| 10073695 | Floating point round-off amount determination processors, methods, systems, and instructions | Cristina S. Anderson, Bret L. Toll, Simon Rubanovich, Amit Gradstein | 2018-09-11 |
| 10061583 | Systems, apparatuses, and methods for data speculation execution | Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Milind B. Girkar | 2018-08-28 |
| 10061589 | Systems, apparatuses, and methods for data speculation execution | Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Milind B. Girkar | 2018-08-28 |
| 10037205 | Instruction and logic to provide vector blend and permute functionality | Bret L. Toll, Jesus Corbal, Jeffrey G. Wiedemeier, Sridhar Samudrala | 2018-07-31 |
| 10037208 | Multi-element instruction with different read and write masks | Mikhail Plotnikov, Andrey Naraikin, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Jesus Corbal | 2018-07-31 |
| 10019262 | Vector store/load instructions for array of structures | Ashish Jha, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney, Milind B. Girkar | 2018-07-10 |
| 10013253 | Method and apparatus for performing a vector bit reversal | Jesus Corbal, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney | 2018-07-03 |
| 10007519 | Instructions and logic for vector bit field compression and expansion | Elmoustapha Ould-Ahmed-Vall, Thomas Willhalm | 2018-06-26 |