Issued Patents 2018
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162687 | Selective migration of workloads between heterogeneous compute elements based on evaluation of migration performance benefit and available energy and thermal budgets | Eugene Gorbatov, Alon Naveh, Inder M. Sodhi, Ganapati Srinivasa, Guarav Khanna +6 more | 2018-12-25 |
| 10127039 | Extension of CPU context-state management for micro-architecture state | Efraim Rotem, Michael Mishaeli, Boris Ginzburg, Alon Naveh | 2018-11-13 |
| 10120691 | Context switching mechanism for a processor having a general purpose core and a tightly coupled accelerator | Boris Ginzburg, Ronny Ronen, Karthikeyan Vaithianathan, Ehud Cohen | 2018-11-06 |
| 10114448 | Autonomous C-state algorithm and computational engine alignment for improved processor power efficiency | Jawad Haj-Yihia, Vijay S. R. Degalahal, Nadav Shulman, Tal Kuzi, Itay Franko +2 more | 2018-10-30 |
| 10095521 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Robert Valentine, Dror Markovich, Yuval Yosef | 2018-10-09 |
| 10089113 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Robert Valentine, Dror Markovich, Yuval Yosef | 2018-10-02 |
| 10083037 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Robert Valentine, Dror Markovich, Yuval Yosef | 2018-09-25 |
| 10078519 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg, Ronny Ronen | 2018-09-18 |
| 10067553 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Doron Rajwan, Nadav Shulman, Alon Naveh +1 more | 2018-09-04 |
| 10037067 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Ryan D. Wells | 2018-07-31 |
| 10007528 | Computing platform interface with memory management | Guy M. Therien, Paul S. Diefenbaugh, Anil Aggarwal, Andrew D. Henroid, Jeremy J. Shrall +9 more | 2018-06-26 |
| 10007321 | Enhancing power-performance efficiency in a computer system when bursts of activity occurs when operating in low power | Hisham Abu Salah, Efraim Rotem, Paul S. Diefenbaugh, Jay D. Schwartz, Sharad C. Tripathi | 2018-06-26 |
| 9983644 | Dynamically updating at least one power management operational parameter pertaining to a turbo mode of a processor for increased performance | Shmuel Zobel, Maxim Levit, Efraim Rotem, Doron Rajwan, Dorit Shapira +1 more | 2018-05-29 |
| 9971688 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg, Ronny Ronen | 2018-05-15 |
| 9939879 | Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor | Avinash N. Ananthakrishnan, Efraim Rotem, Doron Rajwan, Jeremy J. Shrall, Eric C. Samson +1 more | 2018-04-10 |
| 9864667 | Techniques for flexible and dynamic frequency-related telemetry | Doron Rajwan, Yoni Aizik, Itai Feit, Tal Kuzi, Tomer Ziv +1 more | 2018-01-09 |