| 10157063 |
Instruction and logic for optimization level aware branch prediction |
Polychronis Xekalakis, Pedro Marcuello, Alejandro Vicente Martinez, Christos E. Kotselidis, Grigorios Magklis +13 more |
2018-12-18 |
| 10061587 |
Instruction and logic for bulk register reclamation |
David Keppel, Denis M. Khartikov, Fernando Latorre, Grigorios Magklis, Naveen Neelakantam +2 more |
2018-08-28 |
| 10013326 |
Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region |
Raul Martinez, Enric Gibert Codina, Pedro Lopez, Marti Torrents Lapuerta, Polychronis Xekalakis +14 more |
2018-07-03 |
| 10002108 |
Processing device for performing convolution operations |
Enric Herrero Abellanas, Ayose J. Falcon, Frederico C. Pratas, Fernando Latorre, Pedro Lopez |
2018-06-19 |
| 9978014 |
Reconfigurable processing unit |
Enric Herrero Abellanas, Ayose J. Falcon, Fernando Latorre, Pedro Lopez, Frederico C. Pratas |
2018-05-22 |
| 9971540 |
Storage device and method for performing convolution operations |
Enric Herrero Abellanas, Georgios Tournavitis, Frederico C. Pratas, Fernando Latorre, Pedro Lopez +1 more |
2018-05-15 |