Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10146711 | Techniques to access or operate a dual in-line memory module via multiple data channels | Bill Nale, Kuljit S. Bains, George Vergis, Christopher E. Cox, Chong J. Zhao +3 more | 2018-12-04 |
| 10134463 | Reconfigurable clocking architecture | Mozhgan Mansuri, Aaron Martin | 2018-11-20 |
| 10121528 | Apparatus, method and system for providing termination for multiple chips of an integrated circuit package | George Vergis, Kuljit S. Bains, Ge Chang | 2018-11-06 |
| 10079052 | Multiple rank high bandwidth memory | Christopher P. Mozak, Randy B. Osborne, Michael Gutzmann | 2018-09-18 |
| 10033382 | Method and apparatus for dynamic memory termination | Kuljit S. Bains | 2018-07-24 |
| 10031868 | Dynamic bus inversion with programmable termination level to maintain programmable target ratio of ones and zeros in signal lines | Christopher P. Mozak, Bryan K. Casper | 2018-07-24 |
| 10025685 | Impedance compensation based on detecting sensor data | Kuljit S. Bains | 2018-07-17 |
| 9934842 | Multiple rank high bandwidth memory | Christopher P. Mozak, Randy B. Osborne, Michael Gutzmann | 2018-04-03 |