| 10164880 |
Sending packets with expanded headers |
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2018-12-25 |
| 10055360 |
Apparatus and method for shared least recently used (LRU) policy between multiple cache levels |
Daniel Greenspan, Yoav Lossin, Asaf Rubinstein |
2018-08-21 |
| 10048868 |
Replacement of a block with a compressed block to increase capacity of a memory-side cache |
Alaa R. Alameldeen, Glenn J. Hinton, James J. Greensky |
2018-08-14 |
| 10026475 |
Adaptive configuration of non-volatile memory |
Shekoufeh Qawami, Rajesh Sundaram, David J. Zimmerman |
2018-07-17 |
| 10001953 |
System for configuring partitions within non-volatile random access memory (NVRAM) as a replacement for traditional mass storage |
Leena K. Puthiyedath, Toby Opferman, James B. Crossland |
2018-06-19 |
| 9971691 |
Selevtive application of interleave based on type of data to be stored in memory |
Daniel Greenspan |
2018-05-15 |
| 9958926 |
Method and system for providing instant responses to sleep state transitions with non-volatile random access memory |
Leena K. Puthiyedath, Raj K. Ramanujan, Michael Rothman, Vincent J. Zimmer |
2018-05-01 |
| 9910771 |
Non-volatile memory interface |
Eng Hun Ooi, Robert J. Royer, Jr., Michael W. Williams, Jeffrey R. Wilcox, Ritesh B. Trivedi |
2018-03-06 |
| 9904592 |
Memory latency management |
Robert J. Royer, Jr., Eng Hun Ooi |
2018-02-27 |
| 9860173 |
General input/output architecture, protocol and related methods to implement flow control |
Jasmin Ajanovic, David J. Harriman, David M. Lee |
2018-01-02 |