Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10042972 | Assigning nets to wiring planes using zero wire load and signal propagation timing for chip design | Alexandra Echegaray, Bernd Kemmier, Jesse Peter Surprise | 2018-08-07 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10042972 | Assigning nets to wiring planes using zero wire load and signal propagation timing for chip design | Alexandra Echegaray, Bernd Kemmier, Jesse Peter Surprise | 2018-08-07 |