| 10025608 |
Quiesce handling in multithreaded environments |
Ute Gaertner, Lisa C. Heller, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro |
2018-07-17 |
| 9929749 |
Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry |
Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau |
2018-03-27 |
| 9923579 |
Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry |
Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau |
2018-03-20 |
| 9915701 |
Bypassing an encoded latch on a chip during a test-pattern scan |
Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau |
2018-03-13 |
| 9910090 |
Bypassing an encoded latch on a chip during a test-pattern scan |
Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau |
2018-03-06 |
| 9898407 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2018-02-20 |
| 9892067 |
Multiprocessor cache buffer management |
Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill |
2018-02-13 |
| 9886382 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2018-02-06 |
| 9858190 |
Maintaining order with parallel access data streams |
Ekaterina M. Ambroladze, Timothy C. Bronson, Garrett M. Drapala, Matthias Klein, Pak-kin Mak +2 more |
2018-01-02 |