Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10121713 | In-kerf test structure and testing method for a memory array | Hajime Terazawa, Joseph Versaggi | 2018-11-06 |
| 10109636 | Active contact and gate contact interconnect for mitigating adjacent gate electrode shortages | Youngtag Woo | 2018-10-23 |
| 10109637 | Cross couple structure for vertical transistors | Hui Zang, Randy W. Mann | 2018-10-23 |
| 10056377 | Metal layer routing level for vertical FET SRAM and logic cell scaling | Steven Bentley | 2018-08-21 |
| 9929236 | Active area shapes reducing device size | Kwan-Yong Lim | 2018-03-27 |