Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10073776 | Shadow tag memory to monitor state of cachelines at different cache level | Sriram Srinivasan | 2018-09-11 | $37,012,000 |
| 9946646 | Systems and method for delayed cache utilization | — | 2018-04-17 | $7,065,000 |
| 9940247 | Concurrent access to cache dirty bits | — | 2018-04-10 | $10,802,000 |
| 9916243 | Method and apparatus for performing a bus lock and translation lookaside buffer invalidation | Paul James Moyer, Richard Martin Born, Eric Christopher Morton, David S. Christie, Marius Evers +1 more | 2018-03-13 | $10,106,000 |
| 9864681 | Dynamic multithreaded cache allocation | — | 2018-01-09 | $8,421,000 |