RC

Ronald L. Cline

LS Lattice Semiconductor: 1 patents #24 of 76Top 35%
📍 San Jose, CA: #2,540 of 5,991 inventorsTop 45%
🗺 California: #23,431 of 60,411 inventorsTop 40%
Overall (2018): #262,013 of 503,207Top 55%
1
Patents 2018

Issued Patents 2018

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10079054 Selective power gating of routing resource configuration memory bits for programmable logic devices Senani Gunaratna, Brad Sharpe-Geisler, Ting Yew 2018-09-18