Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9747404 | Method for optimizing an integrated circuit layout design | Ming-Jui Chen, Te-Hsien Hsieh, Ping-I Hsieh, Jing-Yi Lee, Yan-Chun Chen | 2017-08-29 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9747404 | Method for optimizing an integrated circuit layout design | Ming-Jui Chen, Te-Hsien Hsieh, Ping-I Hsieh, Jing-Yi Lee, Yan-Chun Chen | 2017-08-29 |