Issued Patents 2017
Showing 1–25 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9835678 | Through substrate via scan cell with comparator mux, and flip-flop | — | 2017-12-05 |
| 9829538 | IC expected data and mask data on I/O data pads | Alan Hales | 2017-11-28 |
| 9824947 | Through silicon via, scan cell stimulus, response to two switches | — | 2017-11-21 |
| 9817070 | Third tap circuitry controlling linking first and second tap circuitry | Baher Haroun, Brian J. Lasher, Anjali Vij | 2017-11-14 |
| 9817071 | TDI/TMS DDR coupled JTAG domain with 6 preset flip flops | — | 2017-11-14 |
| 9810740 | DAP local, group, and global control of TAP TCK | — | 2017-11-07 |
| 9813065 | Simultaneous LVDS I/O signaling method and apparatus | — | 2017-11-07 |
| 9810737 | Gating tap register control bus and auxiliary/wrapper test bus | — | 2017-11-07 |
| 9759771 | TAP and auxiliary circuitry with auxiliary output multiplexer and buffers | — | 2017-09-12 |
| 9753085 | Tap dual port router circuitry with gated shiftDR and clockDR | — | 2017-09-05 |
| 9746517 | IC interposer with TAP controller and output boundary scan cell | — | 2017-08-29 |
| 9746518 | Scan path interface circuit with strobe sequencer and two registers | — | 2017-08-29 |
| 9746515 | Address-command port connected to trace circuits and tap domains | — | 2017-08-29 |
| 9739832 | Test messaging demodulate and modulate on separate power pads | — | 2017-08-22 |
| 9733308 | Tap, CMD with two flip-flops, routing circuit, and data register | — | 2017-08-15 |
| 9720039 | Interleaver ic with up control and capture, shift, update circuitry | — | 2017-08-01 |
| 9714980 | Scan testing scan frames with embedded commands and differential signaling | — | 2017-07-25 |
| 9709627 | Interposer with TAP, trigger, address/data bus, and analog monitor circuitry | — | 2017-07-18 |
| 9709630 | IC top/bottom surfaces coupled to test, scan, and comparator circuitry | — | 2017-07-18 |
| 9709628 | Selectable separate scan paths with hold state multiplexer and adapter | — | 2017-07-18 |
| 9696378 | IC output circuit with test data and shadow data inputs | — | 2017-07-04 |
| 9684033 | Low power scan path cells with hold state multiplexer circuitry | — | 2017-06-20 |
| 9684032 | High speed interconnect circuit test method and apparatus | — | 2017-06-20 |
| 9678155 | DDR circuitry for TAM controller with TAM enable output | — | 2017-06-13 |
| 9678157 | TAPs and TAP selector output enables coupled to output circuitry | — | 2017-06-13 |