Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9786665 | Dual deep trenches for high voltage isolation | Sameer Pendharkar, Alexei Sadovnikov, Guru Mathur | 2017-10-10 |
| 9741718 | High voltage CMOS with triple gate oxide | Pinghai Hao, Sameer Pendharkar, Seetharaman Sridhar, Jarvis Benjamin Jacobs | 2017-08-22 |
| 9673273 | High breakdown n-type buried layer | Sameer Pendharkar, Henry Litzmann Edwards | 2017-06-06 |
| 9633849 | Implant profiling with resist | Sameer Pendharkar | 2017-04-25 |
| 9608105 | Semiconductor structure with a doped region between two deep trench isolation structures | Takehito Tamura, Sameer Pendharkar, Guru Mathur | 2017-03-28 |
| 9583579 | Poly sandwich for deep trench fill | Sameer Pendharkar, Jarvis Benjamin Jacobs | 2017-02-28 |
| 9583612 | Drift region implant self-aligned to field relief oxide with sidewall dielectric | Henry Litzmann Edwards, James Robert Todd | 2017-02-28 |