Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9851915 | Two-stage read/write 3D architecture for memory devices | Kuang Ting Chen | 2017-12-26 |
| 9690510 | Two-stage read/write 3D architecture for memory devices | Kuang Ting Chen | 2017-06-27 |
| 9666302 | System and method for memory scan design-for-test | Ming-Hung Chang, Chia-Cheng Chen | 2017-05-30 |
| 9589885 | Device having multiple-layer pins in memory MUX1 layout | Hung-Jen Liao, Jung-Hsuan Chen, Chien-Chi TIEN, Jui-Che Tsai, Hong-Chen Cheng +1 more | 2017-03-07 |