| 9813061 |
Circuitry for implementing multi-mode redundancy and arithmetic functions |
David Lewis |
2017-11-07 |
| 9806696 |
Systems and methods for a low hold-time sequential input stage |
Dana How |
2017-10-31 |
| 9768783 |
Methods for operating configurable storage and processing blocks at double and single data rates |
Jiefan Zhang |
2017-09-19 |
| 9755647 |
Techniques for handling high voltage circuitry in an integrated circuit |
Andy L. Lee |
2017-09-05 |
| 9740808 |
Method and apparatus for implementing a system-level design tool for design planning and architecture exploration |
Michael D. Hutton |
2017-08-22 |
| 9692418 |
Pipelined interconnect circuitry with double data rate interconnections |
David Lewis, Carl Ebeling |
2017-06-27 |
| 9606573 |
Configurable clock grid structures |
Carl Ebeling, Dana How, Vadim Gutnik, Ramanand Venkata |
2017-03-28 |
| 9582349 |
Methods and apparatus for detecting memory bit corruption on an integrated circuit |
David Lewis |
2017-02-28 |
| 9553762 |
Network-on-chip with fixed and configurable functions |
Dana How, Sean R. Atsatt |
2017-01-24 |