Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853633 | Systems and methods involving lock-loop circuits, clock signal alignment, phase-averaging feedback clock circuitry | Yu-Chi Cheng, Jae Hyeong Kim | 2017-12-26 |
| 9679631 | Systems and methods involving multi-bank, dual- or multi-pipe SRAMs | Robert Haig, Chih-Chiang Tseng, Mu-Hsiang Huang | 2017-06-13 |
| 9613670 | Memory systems and methods involving high speed local address circuitry | Mu-Hsiang Huang, Lee-Lean Shu | 2017-04-04 |