WS

Walter Schwarzenbach

SO Soitec: 2 patents #9 of 67Top 15%
Overall (2017): #94,891 of 506,227Top 20%
2
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9698063 Method of testing a semiconductor-on-insulator structure and application of said test to the fabrication of such a structure Patrick Reynaud, Konstantin Bourdelle, Jean Gilbert 2017-07-04
9576798 Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers Bich-Yen Nguyen, Christophe Maleville 2017-02-21