Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9667237 | Hardware delay compensation in digital phase locked loop | Qu Gary Jin, Paul H. L. M. Schram, Cathy Zhang, Gabriel Rusaneanu, Wenbao Wang | 2017-05-30 |
| 9647674 | Apparatus for generating clock signals having a PLL part and synthesizer part with programmable output dividers | Paul H. L. M. Schram, Gabriel Rusaneanu | 2017-05-09 |
| 9634675 | Phase locked loop with jump-free holdover mode | Paul H. L. M. Schram | 2017-04-25 |
| 9584138 | Phase locked loop with accurate alignment among output clocks | Qu Gary Jin, Guohui Situ, Paul H. L. M. Schram, Changhui Zhang, Richard Geiss | 2017-02-28 |