Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9798352 | Circuits for and methods of implementing a design for testing and debugging with dual-edge clocking | Amitava Majumdar | 2017-10-24 |
| 9628082 | Strength-adjustable driver | David S. Smith, Xiaobao Wang, Arvind Bomdica | 2017-04-18 |
| 9600018 | Clock stoppage in integrated circuits with multiple asynchronous clock domains | Amitava Majumdar, Ismed D. Hartanto | 2017-03-21 |