| 9841807 |
Method and apparatus for a zero voltage processor sleep state |
Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer, Alon Naveh +1 more |
2017-12-12 |
| 9823719 |
Controlling power delivery to a processor via a bypass |
Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi, Vishram Sarurkar +3 more |
2017-11-21 |
| 9753531 |
Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state |
Ryan D. Wells, Inder M. Sodhi |
2017-09-05 |
| 9727388 |
Migrating threads between asymmetric cores in a multiple core processor |
Varghese George, Inder M. Sodhi |
2017-08-08 |
| 9696999 |
Local closed loop efficiency control using IP metrics |
Inder M. Sodhi |
2017-07-04 |
| 9690353 |
System and method for initiating a reduced power mode for one or more functional blocks of a processor based on various types of mode request |
Douglas R. Moran, Achmed R. Zahir, William Knolla, Hartej Singh, Vasudev Bibikar +3 more |
2017-06-27 |
| 9588559 |
Configurable power supplies for dynamic current sharing |
Sandeep K. Venishetti, Srinivas Thota |
2017-03-07 |
| 9569278 |
Asymmetric performance multicore architecture with same instruction set architecture |
Varghese George, Deborah T. Marr |
2017-02-14 |
| 9563254 |
System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time |
Ryan D. Wells, Inder M. Sodhi, Jeremy J. Shrall, Stephen H. Gunther |
2017-02-07 |