Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9727476 | 2-D gather instruction and a 2-D cache | Boris Ginzburg | 2017-08-08 |
| 9710389 | Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform | Sumit Ahuja, Polychronis Xekalakis, Yongjun Park, Vineeth Mekkat, Igor Yanover +2 more | 2017-07-18 |