Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9836399 | Mechanism to avoid hot-L1/cold-L2 events in an inclusive L2 cache using L1 presence bits for victim selection bias | Avinash Sodani, Zainulabedin J. Aurangabadwala | 2017-12-05 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9836399 | Mechanism to avoid hot-L1/cold-L2 events in an inclusive L2 cache using L1 presence bits for victim selection bias | Avinash Sodani, Zainulabedin J. Aurangabadwala | 2017-12-05 |