JB

Jason W. Brandt

IN Intel: 19 patents #54 of 5,604Top 1%
Overall (2017): #1,812 of 506,227Top 1%
19
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9811338 Flag non-modification extension for ISA instructions using prefixes Jonathan D. Combs, Robert Valentine 2017-11-07
9804871 Instruction-set support for invocation of VMM-configured services without VMM intervention Gilbert Neiger, Barry E. Huntley, Ravi L. Sahita, Vedvyas Shanbhogue 2017-10-31
9804870 Instruction-set support for invocation of VMM-configured services without VMM intervention Gilbert Neiger, Barry E. Huntley, Ravi L. Sahita, Vedvyas Shanbhogue 2017-10-31
9804852 Conditional execution support for ISA instructions using prefixes Jonathan D. Combs, Robert Valentine, Kevin B. Smith, Zia Ansari, Maxim Loktyukhin 2017-10-31
9772844 Common architectural state presentation for processor having processing cores of different types Bret L. Toll, John G. Holm 2017-09-26
9766997 Monitoring performance of a processor using reloadable performance counters 2017-09-19
9767272 Attack Protection for valid gadget control transfers Vedvyas Shanbhogue, Ravi L. Sahita, Yuriy Bulygin, Xiaoning Li 2017-09-19
9766999 Monitoring performance of a processing device to manage non-precise events Jonathan D. Combs, Michael W. Chynoweth, Corey D. Gough 2017-09-19
9766891 Apparatus, system, and method for persistent user-level thread Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, Bryant Bigbee +6 more 2017-09-19
9727345 Method for booting a heterogeneous system and presenting a symmetric core view Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more 2017-08-08
9703566 Sharing TLB mappings between contexts Jonathan D. Combs, Benjamin Crawford Chaffin, Julio Gago, Andrew F. Glew 2017-07-11
9703567 Control transfer termination instructions of an instruction set architecture (ISA) Vedvyas Shanbhogue, Uday Savagaonkar, Ravi L. Sahita 2017-07-11
9696997 Real time instruction trace processors, methods, and systems Tsvika Kurts, Ofer Levy, Itamar Kazachinsky, Gabi Malka, Zeev Sperber 2017-07-04
9690588 Elapsed cycle timer in last branch records Ahmad Yasin, Michael W. Chynoweth, Ofer Levy, Angela D. Schmid 2017-06-27
9684511 Using software having control transfer termination instructions with software not having control transfer termination instructions Vedvyas Shanbhogue, Uday Savagaonkar, Ravi L. Sahita 2017-06-20
9632907 Tracking deferred data packets in a debug trace architecture Beeman C. Strong, Stephen J. Robinson, Peter Lachner 2017-04-25
9612938 Providing status of a processing device with periodic synchronization point in instruction tracing system Frank Binns, Matthew C. Merten, Mayank Bomb, Beeman C. Strong, Peter Lachner +3 more 2017-04-04
9544139 Method and apparatus for a non-deterministic random bit generator (NRBG) George W. Cox, David Johnston, Martin G. Dixon, Stephen A. Fischer 2017-01-10
9535487 User level control of power management policies Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh +7 more 2017-01-03