Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847116 | Circuit and method for controlling MRAM cell bias voltages | Syed M. Alam, Thomas Andre | 2017-12-19 |
| 9740431 | Memory controller and method for interleaving DRAM and MRAM accesses | Syed M. Alam, Thomas Andre | 2017-08-22 |
| 9691442 | Memory device with reduced on-chip noise | Thomas Andre, Syed M. Alam | 2017-06-27 |
| 9583169 | Boosted supply voltage generator and method therefore | Syed M. Alam, Thomas Andre, Halbert S. Lin | 2017-02-28 |
| 9552863 | Memory device with sampled resistance controlled write voltages | Thomas Andre, Syed M. Alam, Chitra Subramanian | 2017-01-24 |
| 9542989 | Circuit and method for controlling MRAM cell bias voltages | Syed M. Alam, Thomas Andre | 2017-01-10 |