Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9720764 | Uncorrectable memory errors in pipelined CPUs | Michael Billeci, Christian Jacobi, Martin Recktenwald | 2017-08-01 |
| 9658967 | Evicting cached stores | Willm Hinrichs, Walter Lipponer, Martin Recktenwald, Hans-Werner Tast | 2017-05-23 |
| 9588893 | Store cache for transactional memory | Willm Hinrichs, Walter Lipponer, Martin Recktenwald, Hans-Werner Tast | 2017-03-07 |
| 9588894 | Store cache for transactional memory | Willm Hinrichs, Walter Lipponer, Martin Recktenwald, Hans-Werner Tast | 2017-03-07 |