Issued Patents 2017
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9823414 | Method for fabricating a semiconductor device for use in an optical application | Jens Hofrichter, Mirja Richter, Heike E. Riel | 2017-11-21 |
| 9786664 | Fabricating a dual gate stack of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2017-10-10 |
| 9748098 | Controlled confined lateral III-V epitaxy | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-08-29 |
| 9735010 | Fabrication of semiconductor fin structures | Daniele Caimi, Jean Fompeyrine, Emanuele Uccelli | 2017-08-15 |
| 9704757 | Fabrication of semiconductor structures | Daniele Caimi, Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2017-07-11 |
| 9673104 | Fabrication of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2017-06-06 |
| 9640394 | Method for fabricating a semiconductor structure | Daniele Caimi, Jean Fompeyrine, Emanuele Uccelli | 2017-05-02 |
| 9570169 | Resistive memory device | Veeresh V. Deshpande, Vara Sudananda Prasad Jonnalagadda, Wabe W. Koelmans, Abu Sebastian | 2017-02-14 |
| 9564452 | Fabrication of hybrid semiconductor circuits | Daniele Caimi, Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2017-02-07 |