Issued Patents 2017
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9571111 | System and method to speed up PLL lock time on subsequent calibrations via stored band values | Hayden C. Cranford, Jr., Venkatasreekanth Prudvi, Rajesh Agraramachandrarao, Neelamekakannan Alagarsamy | 2017-02-14 |