Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847347 | Semiconductor structure including a first transistor at a semiconductor-on-insulator region and a second transistor at a bulk region and method for the formation thereof | Elliot John Smith, Nilesh Kenkare | 2017-12-19 |
| 9793372 | Integrated circuit including a dummy gate structure and method for the formation thereof | Elliot John Smith, Jan Hoentschel, Sven Beyer | 2017-10-17 |
| 9768084 | Inline monitoring of transistor-to-transistor critical dimension | Elliot John Smith | 2017-09-19 |
| 9762245 | Semiconductor structure with back-gate switching | Michael Otto | 2017-09-12 |
| 9685336 | Process monitoring for gate cut mask | Elliot John Smith | 2017-06-20 |
| 9590118 | Wafer with SOI structure having a buried insulating multilayer structure and semiconductor device structure | Elliot John Smith, Sven Beyer, Jan Hoentschel | 2017-03-07 |