UG

Umesh Gupta

CS Cadence Design Systems: 1 patents #55 of 238Top 25%
Overall (2017): #207,454 of 506,227Top 45%
1
Patents 2017

Issued Patents 2017

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9589096 Method and apparatus for integrating spice-based timing using sign-off path-based analysis Vishnu Kumar, Manish Bansal, Naresh Kumar, Manuj Verma, Prashant Sethia 2017-03-07