TS

Tobing Soebroto

CS Cadence Design Systems: 1 patents #55 of 238Top 25%
📍 Cupertino, CA: #628 of 1,468 inventorsTop 45%
🗺 California: #24,257 of 60,394 inventorsTop 45%
Overall (2017): #211,189 of 506,227Top 45%
1
Patents 2017

Issued Patents 2017

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9772668 Power shutdown with isolation logic in I/O power domain James E. DeMaris, Jose L. Medero, Scott J. Tucker 2017-09-26