SR

Satish Raj

CS Cadence Design Systems: 2 patents #21 of 238Top 9%
📍 Saratoga, CA: #203 of 665 inventorsTop 35%
🗺 California: #13,043 of 60,394 inventorsTop 25%
Overall (2017): #108,950 of 506,227Top 25%
2
Patents 2017

Issued Patents 2017

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
9817941 Methods, systems, and articles of manufacture for implementing high current carrying interconnects in electronic designs Jeffrey S. Salowe, Mark Rossman 2017-11-14
9754072 Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques Jeffrey S. Salowe, Olivier Pribetich, Karun Sharma, Yinnie Lee, Gary Matsunami 2017-09-05