AT

Andrea Iabrudi Tavares

CS Cadence Design Systems: 2 patents #21 of 238Top 9%
📍 Belo Horizonte, BR: #3 of 47 inventorsTop 7%
Overall (2017): #170,230 of 506,227Top 35%
2
Patents 2017

Issued Patents 2017

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
9817930 Method, system, and computer program product for verifying an electronic circuit design with a graph-based proof flow Caio Araújo Teixeira Campos, Tamires Vargas Campanema Franco Santos, Fabiano Peixoto, Claudionor Coelho 2017-11-14
9633151 Methods, systems, and computer program product for verifying electronic designs with clock domain crossing paths Xiaoyang Sun, Marcus Vinicius da Mata Gomes, Lawrence Loh, Fabiano Peixoto 2017-04-25