Issued Patents 2017
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853143 | Closed cell lateral MOSFET using silicide source and body regions with self-aligned contacts | — | 2017-12-26 |
| 9837386 | Power device and preparation method thereof | Xiaotian Zhang, Zhiqiang Niu, Cheow Khoon Oh, Yueh-Se Ho | 2017-12-05 |
| 9837400 | JEFT and LDMOS transistor formed using deep diffusion regions | — | 2017-12-05 |
| 9748346 | Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter | Madhur Bobde | 2017-08-29 |
| 9698237 | Lateral PNP bipolar transistor with narrow trench emitter | Francois Hebert | 2017-07-04 |
| 9685443 | Compact guard ring structure for CMOS integrated circuits | — | 2017-06-20 |
| 9595517 | Semiconductor device employing trenches for active gate and isolation | — | 2017-03-14 |
| 9548307 | Compact CMOS device isolation | — | 2017-01-17 |