Issued Patents 2016
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524241 | Multi-core microprocessor power gating cache restoral mechanism | Dinesh K. Jain, Stephan Gaskins | 2016-12-20 |
| 9515678 | Hardware data compressor that directly huffman encodes output tokens from LZ77 engine | Terry Parks | 2016-12-06 |
| 9513687 | Core synchronization mechanism in a multi-die multi-core microprocessor | Terry Parks | 2016-12-06 |
| 9509335 | Hardware data compressor that constructs and uses dynamic-prime huffman code tables | — | 2016-11-29 |
| 9507942 | Secure BIOS mechanism in a trusted computing system | — | 2016-11-29 |
| 9507404 | Single core wakeup multi-core synchronization mechanism | Terry Parks, Brent Bean, Stephan Gaskins | 2016-11-29 |
| 9509337 | Hardware data compressor using dynamic hash algorithm based on input block type | Terry Parks | 2016-11-29 |
| 9509336 | Hardware data compressor that pre-huffman encodes to decide whether to huffman encode a matched string or a back pointer thereto | — | 2016-11-29 |
| 9503122 | Hardware data compressor that sorts hash chains based on node string match probabilities | Terry Parks, Kyle T. O'Brien | 2016-11-22 |
| 9483263 | Uncore microcode ROM | Terry Parks, Rodney E. Hooker, John Bunda, Brent Bean | 2016-11-01 |
| 9477608 | Apparatus and method for rapid fuse bank access in a multi-core processor | Dinesh K. Jain | 2016-10-25 |
| 9471502 | Multi-core microprocessor configuration data compression and decompression system | Dinesh K. Jain | 2016-10-18 |
| 9471133 | Service processor patch mechanism | Stephan Gaskins | 2016-10-18 |
| 9465432 | Multi-core synchronization mechanism | Terry Parks | 2016-10-11 |
| 9461818 | Method for encrypting a program for subsequent execution by a microprocessor configured to decrypt and execute the encrypted program | Terry Parks, Brent Bean, Thomas A. Crispin | 2016-10-04 |
| 9442732 | Running state power saving via reduced instructions per clock operation | Terry Parks | 2016-09-13 |
| 9396123 | Core-specific fuse mechanism for a multi-core die | Dinesh K. Jain | 2016-07-19 |
| 9395802 | Multi-core data array power gating restoral mechanism | Dinesh K. Jain, Stephan Gaskins | 2016-07-19 |
| 9396124 | Apparatus and method for configurable redundant fuse banks | Dinesh K. Jain | 2016-07-19 |
| 9389863 | Processor that performs approximate computing instructions | Terry Parks, Rodney E. Hooker | 2016-07-12 |
| 9390022 | Apparatus and method for extended cache correction | Dinesh K. Jain | 2016-07-12 |
| 9384141 | Multi-core fuse decompression mechanism | Dinesh K. Jain | 2016-07-05 |
| 9384140 | Apparatus and method for storage and decompression of configuration data | Dinesh K. Jain | 2016-07-05 |
| 9378019 | Conditional load instructions in an out-of-order execution microprocessor | Terry Parks, Rodney E. Hooker, Gerard M. Col, Colin Eddy | 2016-06-28 |
| 9378147 | Extended fuse reprogrammability mechanism | Dinesh K. Jain | 2016-06-28 |