Issued Patents 2016
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9448284 | Method and apparatus for test time reduction using fractional data packing | Sreenath Narayanan Potty, Rajesh Mittal, Mudasir Shafat Kawoosa | 2016-09-20 | $25,529,000 |
| 9436752 | High availability via data services | Ian David Emmons | 2016-09-06 | $8,599,000 |
| 9419630 | Phase shifted coarse/fine clock dithering responsive to controller select signals | Sreenath Narayanan Potty, Sumanth Reddy Poddutur | 2016-08-16 | $18,393,000 |
| 9319045 | Method and apparatus for reducing gate leakage of low threshold transistors during low power mode in a multi-power-domain chip | Sudesh Chandra Srivastava | 2016-04-19 | $24,153,000 |