Issued Patents 2016
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9531350 | Level shifters for IO interfaces | Chan-Hong Chern, Chih-Chang Lin, Yuwen Swei, Ming-Chieh Huang | 2016-12-27 |
| 9529955 | Integrated circuit layout | Chan-Hong Chern, Li-Chun Tien | 2016-12-27 |
| 9524934 | Integrated circuits with electrical fuses and methods of forming the same | Chan-Hong Chern, Kuoyuan (Peter) Hsu | 2016-12-20 |
| 9478344 | Phase locked loop including a varainductor | Yi-Hsuan Liu, Hsieh-Hung Hsieh, Chewn-Pu Jou | 2016-10-25 |
| 9450573 | Input/output circuit | Chan-Hong Chern, Tsung-Ching Huang, Chih-Chang Lin, Ming-Chieh Huang | 2016-09-20 |
| 9432030 | Circuit and operating method of PLL | Yen-Jen Chen, Hsieh-Hung Hsieh, Chewn-Pu Jou | 2016-08-30 |
| 9426393 | Noise simulation flow for low noise CMOS image sensor design | Shang-Fu Yeh, Kuo-Yu Chou, Yi-Che Chen, Wei Tao, Honyih Tu +1 more | 2016-08-23 |
| 9419617 | Circuit for reducing negative bias temperature instability | Chan-Hong Chern, Ming-Chieh Huang, Bryan Sheffield, Chih-Chang Lin | 2016-08-16 |
| 9412721 | Contactless communications using ferromagnetic material | Ping-Lin Yang, Jun-De Jin, Sa-Lly Liu, Tong-Chern Ong, Chun-Jung Lin +1 more | 2016-08-09 |
| 9397729 | Through chip coupling for signal transport | Tzu-Jin Yeh, Hsieh-Hung Hsieh, Jun-De Jin, Ming-Hsien Tsai, Chewn-Pu Jou | 2016-07-19 |
| 9391626 | Capacitive load PLL with calibration loop | Chan-Hong Chern, Tao Wen Chung, Ming-Chieh Huang, Chih-Chang Lin, Tsung-Ching Huang | 2016-07-12 |
| 9360876 | Voltage supply circuit having an absorption unit and method for operating the same | Chan-Hong Chern, Tsung-Ching Huang, Chih-Chang Lin, Ming-Chieh Huang | 2016-06-07 |
| 9350324 | MCML retention flip-flop/latch for low power applications | Tsung-Hsiung Lee, Shi-Hung Wang, Kuang-Kai Yen, Wei-Li Chen, Yung-Hsu Chuang +3 more | 2016-05-24 |
| 9304164 | Method and apparatus for RFID tag testing | Tsung-Hsiung Li, Kuang-Kai Yen, Yi-Hsuan Liu, Hsieh-Hung Hsieh, Chewn-Pu Jou | 2016-04-05 |
| 9299699 | Multi-gate and complementary varactors in FinFET process | Chi-Hsien Lin, Ying-Ta Lu, Hsien-Yuan Liao, Ho-Hsiang Chen, Chewn-Pu Jou | 2016-03-29 |
| 9275598 | DAC architecture for LCD source driver | Nang-Ping Tu, Mingo Liu | 2016-03-01 |
| 9270908 | Image sensor configured to reduce blooming during idle period | Kuo-Yu Chou, Calvin Yi-Ping Chao, Jhy-Jyi Sze, Honyih Tu | 2016-02-23 |
| 9255963 | Built-in self-test circuit for voltage controlled oscillator | Hsieh-Hung Hsieh, Ming-Hsien Tsai, Tzu-Jin Yeh, Chewn-Pu Jou | 2016-02-09 |