| 9524771 |
DRAM sub-array level autonomic refresh memory controller optimization |
Deepti Vijayalakshmi Sriramagiri, Jungwon Suh |
2016-12-20 |
| 9495261 |
Systems and methods for reducing memory failures |
Jung Pill Kim, Dexter Tamio Chun, Deepti Vijayalakshmi Sriramagiri, Mosaddiq Saifuddin, Sungryul Kim +2 more |
2016-11-15 |
| 9472257 |
Hybrid magnetoresistive read only memory (MRAM) cache mixing single-ended and differential sensing |
Taehyun Kim |
2016-10-18 |
| 9436606 |
System and method to defragment a memory |
Jungwon Suh |
2016-09-06 |
| 9431129 |
Variable read delay system |
Jung Pill Kim, Taehyun Kim, Sungryul Kim |
2016-08-30 |
| 9411727 |
Split write operation for resistive memory cache |
Xiaochun Zhu, Jungwon Suh |
2016-08-09 |
| 9378793 |
Integrated MRAM module |
Jung Pill Kim, Jungwon Suh |
2016-06-28 |
| 9378081 |
Bit remapping system |
Jung Pill Kim, Mosaddiq Saifuddin |
2016-06-28 |
| 9368187 |
Insertion-override counter to support multiple memory refresh rates |
Jung Pill Kim |
2016-06-14 |
| 9348743 |
Inter-set wear-leveling for caches with limited write endurance |
— |
2016-05-24 |
| 9304913 |
Mixed memory type hybrid cache |
Jungwon Suh |
2016-04-05 |
| 9299457 |
Kernel masking of DRAM defects |
Dexter Tamio Chun, Yanru Li, Jungwon Suh, Jung Pill Kim, Deepti Vijayalakshmi Sriramagiri |
2016-03-29 |
| 9292451 |
Methods and apparatus for intra-set wear-leveling for memories with limited write endurance |
— |
2016-03-22 |
| 9275714 |
Read operation of MRAM using a dummy word line |
Taehyun Kim, Sungryul Kim, Jung Pill Kim |
2016-03-01 |
| 9250998 |
Cache structure with parity-protected clean data and ECC-protected dirty data |
Jungwon Suh |
2016-02-02 |
| 9239788 |
Split write operation for resistive memory cache |
Xiaochun Zhu, Jungwon Suh |
2016-01-19 |
| 9230634 |
Refresh scheme for memory cells with next bit table |
Jung Pill Kim, Jungwon Suh |
2016-01-05 |