| 9514061 |
Method and apparatus for cache tag compression |
Henry A. Pellerin, Thomas Philip Speier, Thomas Andrew Sartorius, James Norris Dieffenderfer, Kenneth Alan Dockser +1 more |
2016-12-06 |
| 9477476 |
Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media |
Melinda J. Brown, James Norris Dieffenderfer, Brian Michael Stempel, Michael Scott McIlvaine, Rodney Wayne Smith +2 more |
2016-10-25 |
| 9477478 |
Multi level indirect predictor using confidence counter and program counter address filter scheme |
Kulin N. Kothari, James Norris Dieffenderfer, Michael Scott McIlvaine, Brian Michael Stempel, Daren Eugene Streett |
2016-10-25 |
| 9430385 |
Moveable locked lines in a multi-level cache |
Dennis M. O'Connor, Stephen Strazdus |
2016-08-30 |
| 9317293 |
Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media |
James Norris Dieffenderfer, Michael Scott McIlvaine, Daren Eugene Streett, Vimal Reddy, Brian Michael Stempel |
2016-04-19 |
