JZ

John H. Zhang

SS Stmicroelectronics Sa: 20 patents #3 of 162Top 2%
IBM: 6 patents #782 of 10,295Top 8%
Globalfoundries: 2 patents #439 of 2,145Top 25%
📍 Altamont, NY: #1 of 18 inventorsTop 6%
🗺 New York: #68 of 11,723 inventorsTop 1%
Overall (2016): #1,028 of 481,213Top 1%
23
Patents 2016

Issued Patents 2016

Showing 1–23 of 23 patents

Patent #TitleCo-InventorsDate
9530866 Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts Carl Radens, Steven Bentley, Brian Alexander Cohen, Kwan-Yong Lim 2016-12-27
9530863 Methods of forming vertical transistor devices with self-aligned replacement gate structures Carl Radens, Steven Bentley, Brian Alexander Cohen, Kwan-Yong Lim 2016-12-27
9496283 Transistor with self-aligned source and drain contacts and method of making same 2016-11-15
9496415 Structure and process for overturned thin film device with self-aligned gate and S/D contacts Lawrence A. Clevenger, Carl Radens, Yiheng Xu 2016-11-15
9490355 Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor Pierre Morin 2016-11-08
9484535 High density resistive random access memory (RRAM) Qing Liu 2016-11-01
9466452 Integrated cantilever switch Qing Liu 2016-10-11
9437453 Control of wafer surface charge during CMP 2016-09-06
9425213 Stacked short and long channel FinFETs Qing Liu 2016-08-23
9405065 Hybrid photonic and electronic integrated circuits 2016-08-02
9391020 Interconnect structure having large self-aligned vias Lawrence A. Clevenger, Carl Radens, Yiheng Xu, Richard S. Wise, Akil Khamisi Sutton +2 more 2016-07-12
9385195 Vertical gate-all-around TFET 2016-07-05
9385177 Technique for fabrication of microelectronic capacitors and resistors Lawrence A. Clevenger, Carl Radens, Yiheng Xu, Edem Wornyo 2016-07-05
9337087 Multilayer structure in an integrated circuit for damage prevention and detection and methods of creating the same Lawrence A. Clevenger, Carl Radens, Yiheng Xu, Byoung Youp Kim, Walter Kleemeier 2016-05-10
9337252 Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions 2016-05-10
9324793 Method for controlling the profile of an etched metallic layer Lawrence A. Clevenger, Carl Radens, Richard S. Wise, Edem Wornyo, Yiheng Xu 2016-04-26
9324660 Device and method for alignment of vertically stacked wafers and die Walter Kleemeier, Paul Ferreira, Ronald K. Sampson 2016-04-26
9305974 High density resistive random access memory (RRAM) Qing Liu 2016-04-05
9305997 Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions 2016-04-05
9254510 Drying apparatus with exhaust control cap for semiconductor wafers and associated methods 2016-02-09
9244236 Method for making a photonic integrated circuit having a plurality of lenses 2016-01-26
9245955 Embedded shape SiGe for strained channel transistors Pietro Montanini 2016-01-26
9240375 Modular fuses and antifuses for integrated circuits Lawrence A. Clevenger, Carl Radens, Yiheng Xu, Edem Wornyo 2016-01-19