Issued Patents 2016
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9514061 | Method and apparatus for cache tag compression | Henry A. Pellerin, Thomas Philip Speier, Thomas Andrew Sartorius, Michael William Morrow, James Norris Dieffenderfer +1 more | 2016-12-06 |
| 9477476 | Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media | Melinda J. Brown, Michael William Morrow, James Norris Dieffenderfer, Brian Michael Stempel, Rodney Wayne Smith +2 more | 2016-10-25 |
| 9477478 | Multi level indirect predictor using confidence counter and program counter address filter scheme | Kulin N. Kothari, Michael William Morrow, James Norris Dieffenderfer, Brian Michael Stempel, Daren Eugene Streett | 2016-10-25 |
| 9471325 | Method and apparatus for selective renaming in a microprocessor | Anil Krishna, Sandeep Suresh Navada, Niket K. Choudhary, Thomas Andrew Sartorius, Rodney Wayne Smith +1 more | 2016-10-18 |
| 9460018 | Method and apparatus for tracking extra data permissions in an instruction cache | Leslie Mark DeBruyne, James Norris Dieffenderfer, Brian Michael Stempel | 2016-10-04 |
| 9411590 | Method to improve speed of executing return branch instructions in a processor | Rodney Wayne Smith, Jeffery M. Schottmiller, Brian Michael Stempel, Melinda J. Brown, Daren Eugene Streett | 2016-08-09 |
| 9317293 | Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media | James Norris Dieffenderfer, Michael William Morrow, Daren Eugene Streett, Vimal Reddy, Brian Michael Stempel | 2016-04-19 |